VLSI Design and Verification Engineer
Summary
MS Graduate in Electrical and Computer Engineering from The University of Texas at Dallas.
Student Researcher and Volunteer in Biomedical Microdevices and Nanotechnology Laboratory, UTD
Project Experience: Designed, Built, Implemented, Debugged and Verified digital and analog circuit designs in software as well hardware (fpga)
Key Skills I am interested in: analysis, floorlanning, designing, verification, failure analysis
Proficient in analysis and debugging verification flows for digital VLSI designs, Sensor systems and FPGA.
Software experience: Cadence, Xilinx, Innovus, Design Compiler, PrimeTime, MATLAB , Google Cloud Platform, JMP Pro, Enterprise Equipment Engineering software (E3)
Language experience: HDL, VHDL,Verilog, SystemVerilog, C, C++, Python, HSpice, SQL, Java
soft skills: Focus on problem solving with innovative solutions through efficient time-management and communication skills.
Delivered multiple creative project ideas for power efficient and best gain circuit designs with excellent teamwork and project management skills.
Led 24+ etch specific team collaborations to help identify problems and optimize resolutions with improved sensor data.
Mentored multiple interns and new hires in guiding them towards efficient working ways and collaborative team projects.
Expectations
As a creative and determined engineer, I have delivered multiple creative project ideas for power efficient and best gain circuit designs with excellent teamwork and project management skills.
Led 24+ etch specific team collaborations to help identify problems and optimize resolutions with improved sensor data.
Mentored multiple interns and new hires in guiding them towards efficient working ways and collaborative team projects.
I look for out of the solutions and a work environment that will keep my development wheels churning. A work atmosphere that is challenging but also helps learn new ways of building effficient and effective models.
Employment Preferences
Relocation destinations:
- San Jose, California, United States
- San Francisco, California, United States
- Santa Clara, California, United States
- Houston, Texas, United States
- Austin, Texas, United States
Expected Base Salary
**0,000 USD
Academic Degree
Experience
Total Professional Experience
Skills
Contacts are hidden
Send a connection request to the candidate to get their contact details.
Contact Candidate
