System Power and Performance Lead

System Architect / Principal / Tech Lead Bothell, Washington, United States

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Summary

Pioneering Tablets: Delivered power management for the first ARM-based Windows tablet and the first Atom-based Microsoft Surface, setting benchmarks for power efficiency and performance.
"Shift-Left" Strategy: Achieved 90% software readiness in pre-silicon including system level validation, cutting SoC bring-up time by half.
Led Power and Performance (PnP) strategy for multiple Intel products, including tablets, Laptops and High-Performance compute clusters including GPU.
Defining SoC and system (Memory, GPU and Network) PNP targets and conducting pathfinding exercises to optimize silicon performance.
Establishing PnP measurement infrastructure, KPIs, and reporting mechanisms.
Partnering with Microsoft and other customers to deliver high-quality products with industry-leading PNP characteristics including tablets, laptops and AR/VR headsets.
Managed a team of engineers to develop and enhance power management driver stacks and telemetry frameworks for new silicon.
Directed cross-functional teams (GPU, Security, BIOS, Devices, other firmwares) to enable new power management features and system validation in pre-silicon simulation environments (FPGAs, Zebu, Simics and Hybrid), advocating a shift-left approach to improve software development.
Championed Software Quality Metrics - reliability, scalability, and performance for key power management features.
Contributed to software architecture specifications and mentored team members while collaborating with ingredient software teams.
Contributed towards server infrastructure software needs in pre-silicon including but not limited to BMC firmwares, boot security, UEFI.
Recognized with multiple awards for collaboration, execution, and technological advancements.
Process improvements including adapting Agile methodologies within the team, led creation of a new category for pre-silicon system validation functional requirements at the Business Unit level.

Expectations

Lead, architect system power and performance evaluation strategy for SoC's, Compute, High performance compute, x86, ARM, RISC-V based systems. Define targets from modeling, n-1, measure and meet the best power and perf numbers on a given platform.