Staff Verification Engineer

Summary

A seasoned computer engineer with broad experience in hardware design & verification. Strong programming and EDA tool skills.
Demonstrated skill in meeting tight deadlines and accomplishing successful tape-out of multiple ASICs.

Expectations

Chip verification using constrained-random object-oriented methodology

Employment Preferences

Expected Base Salary

**0,000 USD

Expected Hourly Rate

**5 USD/hr

Academic Degree

Experience

Skills

• SystemVerilog
• SVA Assertions
• UVM
• System C
• Verilog
• FPGA
• ASIC
• Functional Verification
• Python
• C++
• Perl
• Unix